Design and Implementation of G/G/1 Queuing Model Algorithm for its Applicability in Internet Gateway

Design and Implementation of G/G/1 Queuing Model Algorithm for its Applicability in Internet Gateway Server

Laxmi Singh1 and Riktesh Srivastava2
1Department of Solid State Physics and Electronics, Dr. RML Avadh University, India
2Project Head-Internet Technologies, Academecia Software Solution, India

 

Abstract: How to competently apportion system resource to process the client request by gateway servers is a tricky predicament. In this paper, we propose an enhanced proposal for autonomous recital of gateway servers under highly dynamic traffic loads. We have developed G/G/1 queuing model algorithm and premeditated its intricacy, so that there is lossless information repossession at each node of gateway server. This facilitates to reduce response time variance in existence of bursty traffic.  The most widespread contemplation is performance, because gateway servers must offer cost-effective and high-availability services in the elongated period, thus they have to be scaled to meet the expected load. performance measurements can be the base for performance modeling and prediction. With the help of performance models, the performance metrics (like buffer estimation, waiting time) can be determined at the development process, so that there is lossless information retrieval of data at every node of internet gateway servers. The paper portrays the assessment of buffer size using G/G/1 queuing model to estimate the final value of the memory size and then examine its implementation at the gateway servers. The obtained output is based on the simulation and experimental studies using synthesized workloads and analysis of real-world gateway servers demonstrate the effectiveness of the proposed system.

 

Keywords: M/M/1, G/G/1, internet gateway server, queuing process.

 Received February 20, 2007; accepted June 8, 2007

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